Professional Activities

Organizing Committees

  • Topic Co-Chair of “Architectural Synthesis” subcommittee of Design Automation and Test in Europe (DATE) 2006.
  • Topic Chair of “Architectural Synthesis” subcommittee of Design Automation and Test in Europe (DATE) 2007.
  • Topic Chair of “Architectural Synthesis” subcommittee of Design Automation and Test in Europe (DATE) 2008.
  • General Chair of International Conference on Field Programmable Logic and Applications (FPL) Aug. 31st – Sep. 2nd, 2010
  • General Chair of Workshop on Exploiting Regularity in the Design of IPs, Architectures and Platforms – February 23, 2011
  • Topic Co-Chair of “Reconfigurable Computing” subcommittee of Design Automation and Test in Europe (DATE) 2011.
  • Steering Committee member of International Conference on Field Programmable Logic and Applications (FPL) since 2011.
  • Topic Co-Chair of “Synthesis and design space exploration” subcommittee of International Conference on Hardware/Software Codesign and System Synthesis (ISSS-CODES) 2011.
  • Topic Chair of “Reconfigurable Computing” subcommittee of Design Automation and Test in Europe (DATE) 2016.
  • Topic Chair of “Reconfigurable Computing” subcommittee of Design Automation and Test in Europe (DATE) 2017.

Program Committees

  • Program Committee Member of IEEE Innovative Systems on Silicon (ISIS) 1997.
  • Program Committee Member of IEEE IC-SAMOS – The International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation from 2006 to 2008
  • Program Committee Member of ACM/IEEE Design Automation and Test in Europe (DATE) since 2006
  • Program Committee Member of IEEE International Conference on Networking, Architecture, and Storage (NAS) 2010
  • Program Committee Member of ACM Great Lakes Symposium on VLSI (GLSVLSI) since 2011.
  • Program Committee Member of ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (ISSS-CODES) since 2011.
  • Program Committee Member of International Conference on Reconfigurable Computing and FPGAs (ReConFig) since 2012.
  • Program Committee Member of International Conference on Architecture of Computing Systems (ARCS) since 2012.
  • Program Committee Member of Workshop on Virtual Prototyping of Parallel and Embedded Systems (VIPES) from 2013 to 2015.
  • Program Committee Member of ACM/IEEE Design Automation Conference (DAC) 2013 for subcommittee “EDA5 High-Level Synthesis, Logic Synthesis, and FPGAs”.
  • Program Committee Member of ACM/IEEE Design Automation Conference (DAC) 2014 for subcommittee “EDA6 High-Level Synthesis, Logic Synthesis, and FPGAs”.
  • Program Committee Member of ACM/IEEE Design Automation Conference (DAC) 2015 for subcommittee “EDA5 RTL/Logic Level and FPGA Synthesis, Design and Testing”.
  • Program Committee Member of ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC) 2017 for subcommittee “[8] Logic/Behavioral/High-Level Synthesis and Optimization”.
  • Program Committee Member of ACM International Conference on Computing Frontiers (CF) since 2016.

Other activities

I worked as reviewer of IEEE Transactions on Computers, IEEE Transactions on CAD/ICAS, Transactions on Embedded Computing Systems, Transactions on Reconfigurable Technology and Systems, Transactions on Design Automation of Electronic Systems, Journal of System Architecture JSA.
From March 2009 to January 2011 I was part of the editorial board of International Journal of Embedded and Real-Time Communication Systems (IJERTCS).
From 2011 to 2012 I was Associate Editor of IEEE Embedded Systems Letters.